Project Type:

Project

Project Sponsors:

  • Northwestern University

Project Award:

  • $376,118

Project Timeline:

2019-08-01 – 2022-06-30



Lead Principal Investigator:



Partnership for development of high-performance magnetic memory technology


Project Type:

Project

Project Sponsors:

  • Northwestern University

Project Award:

  • $376,118

Project Timeline:

2019-08-01 – 2022-06-30


Lead Principal Investigator:



1.1. Societal Need and Customer: The rise of big data has enabled the emergence of artificial intelligence (AI) in the cloud and on edge devices, and is fundamentally transforming the computing, networking and data storage industries. However, existing hardware cannot sustain this rapid growth. In particular, fast and low-power AI requires embedded memory technologies that are as fast as static random access memory (SRAM), while delivering bit densities similar to dynamic random access memory (DRAM), along with low power dissipation. In this PFI-RP project we address this challenge by developing a new type of magnetic random access memory (MRAM), referred to as voltage-controlled spin-orbit (VCSO) memory. To commercialize VCSO-MRAM we have engaged customers and partners in two markets: (i) Data storage: Our development partner (Western Digital) is a leading manufacturer of memory and storage systems. (ii) Communications and networking: We have also engaged potential customers (Cisco and Qualcomm) to help position the technology for high-speed communications (e.g. 5G) and networking markets. 1.2. Value Proposition: VCSO-MRAM uses a more efficient write mechanism than existing MRAMs, which increases bit density and write speed by ~10× compared to incumbent SRAM and DRAM, respectively. It will disrupt the > $100B semiconductor memory market and opens the way to sustained growth of applications in AI, networking, and autonomous systems. 1.3. Innovation: MRAM is the leading contender for emerging AI systems due to its nonvolatility and high endurance, and is entering volume manufacturing across the industry (including by TSMC, GlobalFoundries, and Samsung). However, its current version, which uses spin-transfer torque (STT) for writing, suffers from density and speed limitations that limit its addressable market. In this PFI-RP project, we will develop devices and test chips based on a combination of two beyond-STT write mechanisms: Voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT). The PI and Co-PIs have a long history of collaborations developing MRAM based on VCMA and SOT mechanisms over the past 5+ years. The proposed VCSO-MRAM will incorporate three innovative elements: (i) Mechanically strained devices: Recently, Kioussis (CSU Northridge) has made the first theoretical predictions, supported by experiments by Khalili (Northwestern) and colleagues, on the use of strain to vastly improve VCMA and SOT (reducing write voltages by ~20×). These predictions have been confirmed in recent experiments. (ii) Combination of VCMA and SOT effects: VCMA and SOT have complementary strengths that make a combined technology most promising for wide market adoption. The assistance of SOT can improve bit error rates and remove the pre-read requirement of VCMA switching, making it much faster (< 1 ns). (iii) Built-in exchange bias: A built-in exchange bias in the free layer of the memory bit speeds up switching and eliminates the need for bias magnetic fields during operation. 1.4. Partnership: The project will be led by Prof. Pedram Khalili as the PI at Northwestern University, who will perform experimental tasks including materials development, device fabrication, and testing. The industry partner Western Digital is represented by Dr. Jordan Katine, who will support the project on fabrication of test arrays for statistical measurements, as well as providing insights on transition to manufacturing. Our academic partner is Prof. Nicholas Kioussis (CSU Northridge) who brings in unique capabilities for predictive modeling of spin transport effects including VCMA, SOT, and tunnel magnetoresistance, which will be critical for accelerating our device development. 1.5. Training and Leadership Development in Innovation and Entrepreneurship: This project will provide entrepreneurial education to students and postdocs through participation in the NSF I-Corps program, as well as programs organized by the Innovation and New Ventures Office (INVO) at Northwestern. Our industry partners will also serve as mentors, providing business perspective and advice to our team members. We also aim to broaden the participation of women, minorities, and underrepresented groups. Our research partner CSU Northridge (a Hispanic-serving institution) has a proven track record in this area. Additional opportunities will be created through interactions of students with industry partners, e.g. through site visits, internships, and other activities.






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